1. Field of the Invention
The present invention relates to a memory device and a method for driving a memory device.
2. Description of the Related Art
There are many kinds of memory devices including semiconductors. For example, a dynamic random access memory (DRAM), a static random access memory (SRAM), an electrically erasable and programmable read only memory (EEPROM), a flash memory, and the like can be given.
A typical example of a volatile memory device is a DRAM. A memory cell of the DRAM includes a writing and reading transistor and a capacitor, and data is stored by holding charge in the capacitor provided in the memory cell (see Non-Patent Document 1). However, because leak current flows in a switching transistor even when the switching transistor is in an off state, rewriting (refresh) operation needs to be performed at intervals of several tens of milliseconds for data holding, which leads to an increase in power consumption.
The DRAM described in Non-Patent Document 1 employs a method for reducing the area occupied by one memory cell and also maintaining an effective channel length of a transistor so as not to cause a short-channel effect by forming a three-dimensional transistor in the memory cell. For example, a structure is disclosed in which a U-shaped vertically long groove is formed in a region where a channel portion of a transistor is formed, a gate insulating layer is formed along a wall surface in the groove, and a gate electrode is formed so as to fill the groove.
However, a conventional DRAM still needs to be refreshed at intervals of several tens of milliseconds to hold data, which leads to an increase in power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem.
A typical example of a nonvolatile memory device is a flash memory. A flash memory includes a floating gate between a gate electrode and a channel formation region in a transistor and stores data by holding charge in the floating gate. Therefore, a flash memory is advantageous in that a data holding period is long and refresh operation needed in a volatile memory device is unnecessary (see Patent Document 1).
However, a gate insulating layer included in the memory device deteriorates by tunneling current in writing, so that the memory device does not function after a number of writing operations. Further, a relatively high voltage and a relatively long time are needed for injecting charge to the floating gate and removing the charge therefrom; therefore, it is not easy to increase the speed of write and erase operations.